package SEQF is
subtype WORD is BIT_VECTOR(0 to 3);
function INC(c: WORD) return WORD;
end SEQF;
--
--
package body SEQF is
function INC(c:WORD) return WORD is
variable a:WORD:=c;
begin
  for i in a'low to a'high loop
    if a(i)='0' then a(i):='1';
    exit;
    else a(i):='0';
    end if;
  end loop;
  return a;
end INC;
end SEQF;

-- complete description of 16 bits counter
use work.SEQF.all;
entity COUNTER is
  generic(clock_width,count_del:TIME);
  port(con:in BIT; z:out WORD);
end COUNTER;

architecture HUFFMAN of COUNTER is
  signal clk: BIT:='0';
begin
  process(con,clk)
    variable count:WORD:="0000";
  begin 
    if not con'stable then
      if con='1' then
	clk <= transport '1' after clock_width;
      else
	clk <= transport '0';
      end if;
    end if;
    if clk='1' and not clk'stable then
      count:=INC(count);
      clk <= transport '0' after clock_width/2;
      clk <= transport '1' after clock_width;
    end if;
    z <= count after count_del;
  end process;
end HUFFMAN;
-- end of 16 bits counter


entity vCOUNTER is
end vCOUNTER;

use work.SEQF.all;
architecture SIMPLE of vCOUNTER is
signal init:BIT;
component COUNTER
  generic(clock_width,count_del:TIME);
  port(con:in BIT; z:out WORD);
end component;
for iCOUNTER:COUNTER use entity work.COUNTER(HUFFMAN);
begin
  iCOUNTER:COUNTER
    generic map(10ns,4ns)
    port map(init,open);
    init<='1' after 20ns,'0' after 60ns,'1' after 70ns,
	  '0' after 120ns,'1' after 150ns, '0' after 200ns;
end SIMPLE;


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